Doctoral Thesis: Analog-to-Digital Converters For Secure and Emerging AIoT Applications
AI algorithms based on convolutional neural networks (CNNs), coupled with their high computational requirements, have stimulated the development of novel energy-efficient hardware. Analog neural networks (ANNs) with in-memory computing (IMC) using resistive random-access memory (RRAM) are promising architectures to reduce latency and increase energy efficiency for IoT devices. However, interface circuitry, including analog-to-digital converters (ADCs) between RRAM and digital components, is becoming the bottleneck of the RRAM-based ANNs. To address this challenge, a direct hybrid encoding for signed expressions (HESE) SAR is proposed to increase the sparsity of ADC output.
In addition to the performance requirements, the security of IoT devices is of paramount importance. An attacker can perform an ADC power side-channel attack (PSA) to steal confidential and sensitive signals by tapping into the power supply of the ADC. This attack exploits the strong correlation between the ADC digital output codes and the ADC power supply using neural networks based PSA. Previous works have implemented current equalizers or noise injections to protect ADCs from PSAs. However, the current equalizer introduces a large area and energy overhead for the ADC, which is not ideal for IoT applications. Additionally, the previous work with noise injection only protects the probing of CDAC supply. To overcome these limitations, two secure ADCs are proposed to improve both energy efficiency and security, making them more suitable for real-world applications
- Date: Wednesday, May 3
- Time: 5:00 pm - 6:00 pm
- Category: Thesis Defense
- Location: 36-462