Doctoral Thesis: Expanding the Design Space of Vertical Gallium Nitride Power Devices

Monday, October 28
4:00 pm - 5:30 pm

MIT Grier Room A (36-401A)

By: Joshua Perozek

Thesis Supervisor: Tomas Polacios

Details

  • Date: Monday, October 28
  • Time: 4:00 pm - 5:30 pm
  • Category:
  • Location: MIT Grier Room A (36-401A)
Additional Location Details:

Zoom Details
https://mit.zoom.us/j/97189379636
Meeting ID: 971 8937 9636

Abstract:
Solid state electronic devices have been the backbone of modern power systems for decades. However, as we enter an era fueled by renewable energy and defined by pervasive electrification, novel power devices must be developed to address the increasingly stringent demands for high power density and efficiency.

In this thesis, the theory and fabrication of several new vertical gallium nitride (GaN) power devices will be developed to push beyond current device limitations. Specifically, we will present how a three-dimensional approach to fabrication enables self-aligned fabrication of vertical GaN finFETs. To prove the scalability of the GaN finFET, we then demonstrate the first 8-inch vertical GaN finFET process that is fully CMOS compatible to leverage the manufacturing capabilities of the silicon industry. Finally, we explore methods to push beyond the fundamental limitations of traditional vertical GaN devices with the possibility of GaN superjunctions. After examining the superjunction design space within the context of GaN, we develop a new design framework and experimentally demonstrate the first high aspect-ratio GaN fin diodes.

Through this work, we show how new fabrication technology can dramatically expand the GaN transistor design space to address the upcoming needs of the power electronics industry.

Host