Doctoral Thesis: Designing Fast and Programmable Routers


Event Speaker: 

Anirudh Sivaraman

Event Location: 

32-G449 (Kiva)

Event Date/Time: 

Thursday, June 22, 2017 - 2:00pm


Historically, the evolution of network routers was driven primarily by
performance. Recently, owing to the need for better control over
network operations and the constant demand for new features,
programmability of routers has become as important as performance.
However, today’s fastest routers, which run at line rate, use
fixed-function hardware, which cannot be modified after deployment.
This talk will describe three router primitives we have developed to
build programmable routers at line rate.

The first is a programmable packet scheduler. The second is a way to
program stateful packet-processing algorithms to manage network
resources. The third is a design to measure programmer-defined
statistics, such as counters and moving average filters, on a per-flow
basis, while supporting a large number of flows. Together, these
primitives allow us to program several packet-processing functions at
line rate for the first time, such as in-network congestion control,
active queue management, data-plane load balancing, network
measurement, and packet scheduling.
Thesis Supervisors: Profs. Hari Balakrishnan and Mohammad Alizadeh