Tomás Palacios, Assistant Professor in the Department of Electrical Engineering and Computer Science at MIT and Principal Investigator with the Microsystems Technology Laboratories, MTL, working with EECS graduate student, Will Chung, has created a hybrid chip that combines silicon transistors on the same wafer with ones made from gallium nitride, the material which can handle the speed sensitive job of computations.
As Palacios related to the MIT News Office September 15, scaling down with just silicon is reaching its end point in terms of size and speed. "There are several semiconductor materials that offer better performance than silicon. The problem is, even though they allow for very fast transistors, they cannot compete with silicon in terms of integration and scalability."
Palacios said that the effort put into mass production of silicon microprocessor chips represents decades and billions of dollars to reach efficient and reliable end products. He reasoned that most of the transistors on a single chip are not needed for speed leaving the computation needs--where speed is crucial--to only 5-10 percent of the total.
Palacios and Chung developed the hybrid chip--a feat that has eluded numerous researchers in the past--by embedding a gallium nitride layer into the same type of silicon substrate used by the silicon electronics industry today. Not only is the demand for energy by the new hybrid much lower, but the manufacturing infrastructure standards remain intact.
- MIT News Office, Sept. 15, 2009 "Two chips in one"