EECS Professor Judy L. Hoyt, principal investigator in and currently Associate Director of the Microsystems Technology Laboratories, MTL, at MIT, pioneered the development of strained Si MOSFET technology in the 1990s. Her present research interests are in the areas of novel silicon-based heterostructure and nanostructure devices, new processes and materials for advanced device applications, Si heteroepitaxy, and CMOS front-end process integration.
In the Fall issue of MIT's Spectrum magazine which focuses on the work in nanotechnology of eight MIT faculty members, Hoyt is noted for the advances she has made and continues to explore in nanostructured architectures using alternatives to Silicon.
Judy Hoyt's work could impact a wide range of applications, such as increasingly jaw-dropping capabilities for consumer electronics. Photo: Len Rubenstein
Faster, More Energy Efficient Digital Electronics
by Deborah Halber
Electronics have come a long way since cell phones were the size of Maxwell Smart’s shoe phone. The advances in nanoelectronics that enable smart phones to record video and surf the web may one day account for wearable or implantable medical devices and sensors that detect metal fatigue on airplanes or pollutants in the atmosphere.
The compression of all that technology is based on the scaling of the transistor, and Judy L. Hoyt, professor of electrical engineering and computer science, is pioneering new ways to make these building blocks even smaller and more powerful. Technically speaking, she said the goal is faster and more energy efficient digital electronics that could impact a wide range of applications, such as increasingly jaw-dropping capabilities for consumer electronics and high-performance supercomputers able to tackle complex problems in fluid dynamics, for instance, and weather forecasting.
Engineers had chugged along fulfilling Moore’s Law — doubling the number of transistors on a chip every two years — until they ran up against the laws of physics, said Hoyt, associate director of the Microsystems Technology Laboratories (MTL). In the 1990s she spearheaded the atomic-level tinkering that now is used in digital integrated circuits, AKA chips. She and her colleagues at Stanford pioneered methods to improve transistor performance. They adapted a process developed by materials scientists to “strain” silicon by depositing it on top of a substrate whose atoms are spaced farther apart, causing the silicon atoms to line up wider and its electrons to flow faster.
With manufacturers’ ability to provide increased electron velocity and performance again running out of steam, Hoyt, who holds six patents, continues to explore ways to change the nanostructured architecture of transistors and experiment with new candidates that might one day displace silicon as the favored material of microchips.
Hoyt and others are scouring the periodic table for “strainable” semiconductors that might rival silicon’s excellent properties; lustrous germanium is in the running, as well as indium arsenide. They are also exploring ways to improve transistor architecture: basically switches, transistors have a gate like the tap on a faucet, turning electrical flow off and on. Instead of a discrete gate, Hoyt and others are looking into having the gate wrap entirely around the conducting channel: this “gate all around” or nanowire geometry permits less leakage when the switch is off (important for energy efficiency), and the use of strain or alternate channel materials, such as those noted above, provides enhanced electrical current when the switch is on. The double-whammy of a new material and a new transistor architecture may potentially lead to another quantum leap in speed and performance, she said.
“We can generate fundamental advances in a laboratory and then share those ideas with the world,” Hoyt said. “It’s during this process of shared discovery that things get really exciting.”