Doctoral Thesis: Fundamental Limits of the Switching Abruptness of Tunneling Transistors


Event Speaker: 

James Teherani

Event Location: 


Event Date/Time: 

Thursday, May 14, 2015 - 10:00am


The tunneling field-effect transistor (TFET) is one of the most promising candidates for future low-power electronics because of its potential to achieve a subthreshold swing less than the 60 mV/decade thermal limit at room temperature; however, theoretical predictions and experimental measurements of TFET device characteristics have differed by a wide margin—experimental subthreshold characteristics have not achieved the switching steepness (i.e., the change in drain current with applied gate voltage) of theoretical simulations. A strained‑Si/strained-Ge bilayer TFET is used as a test-bed structure to better understand the discrepancy between simulation and experiment.

In this work, the band alignment of the strained-Si/strained-Ge heterostructure is extracted though an experimental quasistatic CV technique. The extracted effective band gap (related to the tunneling barrier) is shown to be only ~200 meV for the heterostructure, and the valence band offset is shown to be ~100 meV larger than predicted by density-functional theory. The impact of quantization on the turn-on voltage and gate-leakage current in a thin-body bilayer TFET structure is studied, and large confinement energy is shown to be especially problematic at body thicknesses less than 10 nm. The strained-Si/strained-Ge heterostructure is shown to dramatically reduce the turn-on voltage. Electrostatic design and fabrication of the 3Gate bilayer TFET is presented as a structure that enables control of the tunneling direction through the use of multiple gates.

Thesis Supervisor(s): Judy Hoyt and Dimitri Antoniadis