6.888 Parallel Heterogeneous Computer Architecture

SHARE:

Prereq: 6.004 or consent of the instructor
Recommended: 6.033, 6.172, 6.823
Grad-H level
Units: 4-0-8
Lecture: MW1-2:30, room 1-135
Instructors:  Profs. Daniel Sanchez, sanchez@csail.mit.edu; Joel Emer, emer@csail.mit.edu
 
DESCRIPTION
This subject qualifies as a subject in the Computer Systems Concentration.
 
Introduction to modern parallel architectures and programming models, including heterogeneous and special-purpose computing and memory hierarchy design, communication, and synchronization. Lectures and readings from original research papers. Topics include the effects of both VLSI and programming models on computer architecture; the design of modern multicore processors; shared memory and message-passing communication models; data and task-parallel programming models; architectural trade-offs and approaches to improve performance and energy efficiency through specialization; multicore memory hierarchy, caching, coherence, and consistency; architectural mechanisms for fine-grain synchronization; transactional memory. Semester-long research-oriented project and paper. Enrollment may be limited. 6 Engineering Design Points.