MIT Department of Electrical Engineering & Computer Science

A High-Performance Micro-Processor in 2010: is Micro-2010 a Myth or Reality?

Manpreet Khaira
Intel, Strategic CAD Laboratories

Monday, September 14, 1998
4:00 PM (refreshments 3:45)
Edgerton Hall, Room 34-101
EECS Colloquium

Abstract

Is a processor with a billion transistors that executes 100 BIPS (Billion Instructions Per Sec) possible? This talk describes what the Micro-2010 would be like and the challenges involved in its design.

We expect all aspects of life to be impacted by Micro-2010. Applications like tele-presence, augmented reality, and reality animation indicate that such microprocessor performance will be a critical enabling technology. This talk makes an attempt to describe the characteristic features of a microprocessor of 2010, and identifies the challenges involved in their design and test.

Micro-2010 will run at a frequency in excess of 4 GigaHertz. Getting to that level of performance while meeting the power budget (<100 Watts) and area budget (<$500 cost) will require breakthroughs in circuit design methodologies, CAD tools and technologies, and process technology. If current design methodology trends were to continue, the design team for Micro-2010 would need to include every single VLSI design engineer graduating after 2005! So major breakthroughs in design methodology, enabled by a new generation of CAD tools, are essential if such designs are to become a reality.

The semiconductor process in 2010 will have a minimum feature size less than 0.1 micron and the transistors a gate oxide thickness of less than 10 layers of Silicon Dioxide molecules. These dimensions are smaller than the wavelength of visible light and will require major breakthroughs in process technology. And new error control ideas are needed: given the expected volume of shipment of Micro-2010, major design errors cannot be tolerated, but avoiding errata in a 1 Billion Transistor design is practically impossible. The talk will identify specific research directions in the areas of design and CAD tools to meet the challenges of designing the Micro-2010, and propose possible solutions.