Monday, May 4, 1998
4:00 PM (refreshments 3:45)
Room NE43-518
EECS Special Seminar
Abstract
Vector supercomputers have been the most powerful computers in the world ever since their introduction over twenty years ago. Recently, however, microprocessor-based systems have approached, or even exceeded, the performance of vector supercomputers on some tasks and at much lower costs. Modern microprocessors exploit application parallelism using superscalar architectures which are more flexible than the vector model, leading many to believe that vector machines are a dying breed. But the improved cost/performance of superscalar microprocessors is due primarily to their use of commodity silicon CMOS fabrication technology, and the flexibility of superscalar architectures comes at the cost of dramatic increases in design effort, die area, and power consumption. Vector units are a much simpler hardware mechanism for supporting high degrees of parallelism, provided computations can be cast into a data parallel form.
In this talk, I present the case for vector microprocessors --- vector architectures implemented in commodity CMOS technology. I show that vector units are capable of exploiting much of the parallelism available in future computing workloads, including audio and video processing, cryptography, speech and handwriting recognition, database operations, garbage collection, audio synthesis, and 3D graphics. Results are presented from application implementations on T0 (Torrent-0), a full-custom VLSI vector microprocessor designed and fabricated as part of this work. T0 issues only a single 32-bit instruction per cycle, but is capable of sustaining over 24 operations per cycle.
I conclude with a description of ongoing work within the IRAM project at UC Berkeley, which is integrating a vector microprocessor and DRAM memory on one die with the goal of achieving supercomputer-class performance in a portable hand-held device.
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Modified: Apr 23, 1998
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