MIT Department of Electrical Engineering & Computer Science

Massachusetts Institute of Technology

MTL VLSI SEMINAR

Tuesday
October 25, 1994
3:30 Reception
4:00 Lecture
Room 34-101
50 Vassar Street

Trends and Challenges for Deep Submicron VLSI

Ping Yang
Texas Instruments Inc.
Dallas, Texas

Deep submicron CMOS is the key technology for future VLSI. In this paper, a number of key device and technology trends will be examined. The corresponding challenges in the areas of device, metal interconnect, circuit design, and reliability will be described. A number of possibilities for further technology enhancement, such as SOI and low power, will be discussed.