MIT Department of Electrical Engineering & Computer Science

May 2, 1995
3:30 Reception, 4:00 Lecture
Room 34-101, 50 Vassar Street

Title: Impact of MOSFET Threshold-Voltage Variation on Supply-Voltage Scaling Limits

Shih-Wei Sun and David Burnett
Motorola
Austin, Texas

A fundamental limit of CMOS supply-voltage (Vcc) scaling will be addressed as a function of the statistical variation of MOSFET threshold-voltage (VT). Variation of circuit propagation-delay (Tpd) significantly increases as Vcc is scaled down towards the MOSFET VT. An empirical power-law relationship was derived to describe the scattering of circuit speed (Delta-Tpd) as a function of MOSFET VT variation (Delta-VT) and (Vcc - VT). The VT mismatch caused by channel dopant fluctuation will then be discussed from SRAM cell stability point of view. The bit-cell minimum operation voltage (Vcc,min) degrades substantially as the driver and transfer device-pair VT mismatch becomes excessive. These limitations on CMOS Vcc scaling pose additional challenges for the design and manufacturing of low-power portable equipment and battery based systems.