MIT Department of Electrical Engineering & Computer Science

E E C S

April 25, 1995
3:30 Reception, 4:00 Lecture
Room 34-101, 50 Vassar Street

Title: MOS Scaling Limits and Low Temperature Microelectronics

Fritz H. Gaensslen
Independent Consultant
Yorktown Heights, New York

Over the past three decades there has been phenomenal growth in density and performance of MOS integrated circuits, largely achieved by downward scaling. This trend cannot continue indefinitely for reasons such as processing and materials limitations, exploding manufacturing costs and fundamental physical limitations. By operation of MOS microelectronics at liquid nitrogen temperature (77 K or -196 C) impending density and performance limits are pushed out. Most of the gating parameters undergo immense improvements at cryogenic temperatures yielding vastly better systems. The advantages and disadvantages of low temperature operation are discussed and developments within this exciting field of research are traced.


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