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MIT Electrical Engineering and Computer Science
EECS Event |
Tuesday, November 13, 2001
4:00 PM (reception 3:30)
Edgerton Hall, Room 34-101
MTL VLSI Seminar
Abstract
A major difference between III-V and silicon based technologies is lower resistivity of silicon substrates (0.01 - 20 W-cm) compared to the high resistivity of semi-insulating III-V substrates. This low substrate resistivity if not properly engineered can significantly affect gain, isolation and noise performance of RF circuits. This seminar will examine the substrate effects in low noise amplifiers (LNAís), voltage controlled oscillators, and transmit/receive switches, and will discuss a unified way of understanding a large portion of these effects in terms of power consumption associated with substrate resistances. In general, the effects can be reduced by making the substrate resistances either very small or very large. For silicon integrated circuits, it is more practical to lower substrate resistances, and techniques to implement this remedy in silicon integrated circuits technology will be discussed. Lastly, the performance of 2.4-GHz CMOS LNA and mixer fabricated in a 0.25-um CMOS process, which incorporate these substrate engineering techniques will be described. The LNA and mixer satisfy the performance requirements for 2.4-GHz wireless LAN applications.