E E C S  MIT Electrical Engineering and Computer Science

Fall 2000 Catalogue Supplement

6.893 Advanced VLSI Computer Architectures (H)

TR 2:30-4, Room 4-159
Prof. Krste Asanovic, Room NE43-617, x3-8081
Prereq.: 6.823 or permission of instructor
3-0-9

Qualifies as a subject in the Computer Systems Architecture Engineering Concentration

This class will explore future directions for VLSI computer architecture, looking ahead to devices holding over one billion logic transistors. Students will discuss prior research and investigate new idea with semester-long class projects. Topics: VLSI scaling trends and implications for architecture; techniques for obtaining parallelism at application, compiler, and hardware levels; future memory hierarchies including processor-in-memory structures; on-chip communication architectures; low-power and energy-exposed architectures; the future of I/O; reconfigurable computing; heterogeneous architectures.

Classes will include both lectures and class discussions of assigned readings. Grades will be based on class participation and a project. Students are expected to read and digest all assigned reading and to articulate their views in class discussions. Each student will be responsible for presenting one or more assigned papers and to lead a class discussion of the material. Students will perform projects in groups and are encouraged to select topics that overlap with their own research. Each project will result in a conference-style 8-10 page paper and a 20-minute presentation. Enrollment may be limited.


Related page: EECS Fall 2000 Catalogue Supplement
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Editor: Lisa A. Bella   |   Created: May 18, 2000   |   Modified: Sep 1, 2000
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