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MIT Electrical Engineering and Computer Science
EECS Event |
Thursday, April 12, 2001
3:00 PM (refreshments 2:45)
Bldg. 24-121
EECS Special Seminar
Abstract
Analog and mixed-signal integrated circuits (IC) are in ever increasing demand for wireless communication and optical networking applications. Serving as the interface between real world signals and digital processors that have continually higher ability to process such signals, these circuits are being constantly pressed to deliver higher performance at lower power and lower cost. While better fabrication technology is leading the way toward achieving such improvements, significant gains are also being realized by developing new circuit architectures that leverage the strengths of the technology being used. In particular, for CMOS technology, architectures are being developed that break the traditional boundaries between analog and digital circuits and realize "mixed-signal" solutions that achieve outstanding results in the interface application space.
In this talk, we present two examples of applying the mixed signal approach to the area of interface circuits. The first is a low power wireless transmitter architecture implemented in .6u CMOS that meets the performance requirements of the DECT radio standard. At the heart of this system is a fractional-N frequency synthesizer that uses Sigma-Delta modulation of its divider to achieve fine frequency resolution. A digital compensation method allows digital frequency modulation of the synthesizer to be achieved at data rates exceeding 2.5 Mbit/s. The second example is a 2.5 Gbit/s clock and data recovery circuit for optical networking applications that is implemented in 0.24u CMOS. The IC achieves the same jitter performance as competing SiGe products at half the power consumption and 1/5 the package size. These examples clearly illustrate the benefits of using a mixed signal approach in CMOS to achieve high performance, low power, and low cost.