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MIT Electrical Engineering and Computer Science
EECS Event |
Tuesday, March 13, 2001
4:00 PM (reception 3:30)
Edgerton Hall, Room 34-101
MTL VLSI Seminar
Abstract
The critical dimensions of silicon transistors are entering the nanoscale regime where new physical effects are expected to be felt. My objective in this talk is to present a simple view of the physics of transistors at this scale. A theory for the ballistic MOSFET will be presented and used to establish theoretical performance limits for transistors. The role of scattering, which limits the performance of actual devices will be examined using a transmission theory similar to that used for conduction in mesoscopic and molecular scale structures. Using this theory, the I-V characteristics are expressed in terms of a channel backscattering coefficient. As the channel length shrinks, the transistor’s on-current approaches an upper limit; present day devices operate with on-currents that are ~40% of the ballistic limit. The MOSFET channel resistance also approaches a lower limit as L approaches zero (analogous to the e2/h quantum contact resistance). Different types of devices (e.g. bulk or SOI) have different limiting performances. Other factors to be examined are: i) the expected performance of end-of-the-Roadmap MOSFETs, ii) why traditional models based on macroscopic concepts such as mobility and drift-diffusion have provided a such a good guide to device design, iii) when traditional models will fail, iv) how one should interpret results of detailed simulations and v) what this new view has to , say about the future evolution of CMOS device technology. The transmission view provides a clear, yet simple, picture of transistor physics at the nanoscale. It may prove useful for exploring ways to push transistors to their limits as well as serving as a jumping off point for exploring radically new devices such as molecular electronics.