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MIT Electrical Engineering and Computer Science
EECS Event |
Tuesday, October 24, 2000
4:00 PM (refreshments 3:30)
Edgerton Hall, Room 34-101
MTL VLSI Seminar
Abstract
Deep sub-micron effects are having a significant impact on the analysis of high performance designs. In this talk, we will discuss how a number of existing analysis approaches are no longer valid and how new analysis needs are emerging. Particularly, we will focus on the impact of signal waveforms and noise on timing analysis, the emergence of inductance as a major issue in chip performance verification, and the signal integrity issues related to the power supply of a high frequency part. We will discuss the problems with existing approaches, demonstrate emerging issues, and show how some of these issues are addressed in PowerPC™ designs.